Listed below is the typical process for any analog, mixed signal, or RF IC design. Digital blocks will add steps on Verilog/VHDL definition, synthesis, clock trees, timing extraction, scan chains, and other items unique to digital ASIC's.
Product Definition:
- Architecture & Performance Criteria
- System Level
- Chip Level
- Internal Blocks
- Critical Path Issues
- Block Diagram
- Top Level Chip Specification.
- Tradeoffs for most cost effective integration
- Fitting to a cost optimal foundry process.
Contract Agreement & Quote:
- NRE
- Unit price
- Completion schedule
Preliminary Design:
- Transistor level schematic capture
- Simulation
- Preliminary Test Specification
- Preliminary Design Specification.
Preliminary Design Review:
- Circuit architecture
- Simulation results and support data.
- Size estimate and chip floorplan
- Package selection
- Preliminary test specification.
Critical Design Review:
- Final schematics and simulations.
- Final specification.
- Sign-off
Layout:
- Physical Layout
- DRC
- LVS
- Bonding Diagram
- LPE
- Back annotation and parasitic simulations
Fabrication:
- E-beam mask set
- Base layer fabrication
- Poly-silicon and metal layer fabrication.
- Prototype assembly
Laboratory Prototype Evaluation:
- Prototype testing & approval
Production Pilot Run:
- Production test program
- Testing pilot parts
- Review test program, and hardware tooling
- Optimize test time
- Production release
Production
|
