PUBLICATIONS
- "Efficient Simulation and Validation for Mixed-Signal SOCs" EDN Magazine, March 29, 2007 (select here for PDF)
- "Determine Foundry-Model Problems Without Touching a Wafer" Chip Design Magazine, April/May, 2006 (select here for PDF)
- “Simulation Vs. Silicon: Avoid Costly Mistakes With Accurate Models” Electronic Design Magazine, October 28, 2004 (select here for PDF)
- “Signal Integrity Effects in Custom IC and ASIC Designs” IEEE Press, Wiley Interscience, contributing author, published 2002, ISBN 0-471-15042-8
- "Designing Analog and Mixed Signal Circuits on Digital CMOS Processes” EDN Magazine, August 3, 2000 (select here for PDF)
- “Noise Reduction Is Crucial to Mixed-Signal ASIC Design Success (Part 1)”Electronic Design Magazine, October 30, 2000 (select here for PDF)
- “Noise Reduction Is Crucial to Mixed-Signal ASIC Design Success (Part 2)” Electronic Design Magazine, December 4, 2000 (select here for PDF)
- “BiCMOS 5HPE A New Silicon Germanium Technology for High Frequency RF Applications” IBM Micro News, Volume 7, Number 4, 2001 (PDF document)
ACADEMIC AND PROFESSIONAL
- Chairman, 2005, 2006, 2007 IEEE San Diego Solid State Circuits Society
- Chairman, 2005, 2006, 2007 IEEE San Diego Microwave Theory and Techniques Society
- Reviewer, 2003, 2005, 2006, 2007 IEEE Journal of Solid State Circuits
- Reviewer, 2005 IEEE Microwave Theory and Techniques
- Instructor, UCSD Extension "CMOS Analog and Mixed Signal IC Design" - 1999 - 2002
- Senior Member of IEEE.
DESIGN EXPERIENCE
- ESD I/O Cells: Digital, RF, Analog, (2KV to 6KV JEDEC HBM)
- ADCs: 14 bit (VCO/counter) 13 bit (delta-sigma) 8 bit (pipeline) 10 bit (successive approximation) 6 bit (Flash).
- DACs: 4 bit to 12 bit, (current steering, multiplexing R-string, PWM over-sampling, delta-sigma)
- PLLs: Both ring oscillator and LC VCO structures. Timing recovery, Mixer-LO, video/DVD synchronization, and frequency synthesis.
- Filters: Active op-amplifier with RC, switched capacitor, and trans-conductor (gmC) structures. Selective frequency controls and process compensation tuning systems.
- Mass Storage: LNA/Pre-Amplifiers, read channels for both disk/tape drives, power drive electronics for spindle motor and servo control.
- High Speed Data: SerDes and LVDS to 20 GB/sec.
- Power Management, Supervisory/Support Circuitry: Thermal monitoring, voltage regulators and Low Drop Out (LDO) regulators, Battery protection system for Li-Ion Batteries, Op-amps, comparators, band-gap references, variable gain amplifiers, offset alignment, process calibration circuits, network analysis for RF packaging, feedback and control systems.
- Foundry/Fabrication/Modeling: Involved with the development of four different foundry processes, both in the definition of the process and its model validation.
DESIGN TOOL LITERACY
Cadence, Analog Artist, Spectre, Spectre-RF, Verilog-AMS, Virtuosso-XL, Dracula, Mentor Graphics, Design Architect, Accusim, Calibre, Viewlogic, HSPICE/SmartSPICE, Berkley SPICE, PSPICE, Matlab, Orcad.
RESUME/CV
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